L3 cache is typically: MCQ with Answer and Explanation

L3 cache is typically:

A. Shared among all CPU cores

B. Used only for instructions

C. Slower than registers but faster than RAM

D. Private to each core

Answer: Option A

It acts as a larger shared cache layer.

This question belongs to: Computer CPU (Central Processing Unit)

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Question #1 Report Error

The loop buffer or uop cache stores:

A. Data from memory

B. Addresses

C. Power states

D. Decoded micro-operations for loops

Correct Answer: Option D

Explanation:
Reduces power by avoiding repeated decode.

This question belongs to: Computer CPU (Central Processing Unit)

Question #2 Report Error

Which is not a function of the Control Unit?

A. Performing division

B. Instruction decoding

C. Generating timing signals

D. Managing data flow

Correct Answer: Option A

Explanation:
Arithmetic operations like division are handled by ALU.

This question belongs to: Computer CPU (Central Processing Unit)

Question #3 Report Error

Which helps mitigate Spectre attacks?

A. More cores

B. Higher TDP

C. Larger cache

D. Hardware fences and speculation barriers

Correct Answer: Option D

Explanation:
Processor and OS level mitigations.

This question belongs to: Computer CPU (Central Processing Unit)