The decode stage translates: MCQ with Answer and Explanation

The decode stage translates:
A. High level language
B. Output to input
C. Data to address
D. Machine code to control signals
Answer: Option D
Solution (By JKExamLibrary)
It interprets the binary instruction.

This question belongs to: Computer CPU (Central Processing Unit)

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Practice More CPU (Central Processing Unit) Questions

Question #1 Report Error
Which metric combines clock speed and IPC?
A. TDP only
B. Cache hit rate
C. Core temperature
D. Overall performance in benchmarks

Correct Answer: Option D


Explanation:
Determines effective speed.

This question belongs to: Computer CPU (Central Processing Unit)
Question #2 Report Error
The memory controller can be:
A. Irrelevant
B. Always external
C. Integrated in the CPU
D. Part of ALU

Correct Answer: Option C


Explanation:
On-die memory controller reduces latency.

This question belongs to: Computer CPU (Central Processing Unit)
Question #3 Report Error
Flag register is also called:
A. Status Register or EFLAGS
B. Program Counter
C. Accumulator
D. Stack Pointer

Correct Answer: Option A


Explanation:
Contains condition codes.

This question belongs to: Computer CPU (Central Processing Unit)