The Instruction Decode Queue (IDQ) holds: MCQ with Answer and Explanation

The Instruction Decode Queue (IDQ) holds:
A. Memory addresses
B. Results
C. Raw instructions
D. Decoded micro-operations
Answer: Option D
Solution (By JKExamLibrary)
It feeds the execution engine.

This question belongs to: Computer CPU (Central Processing Unit)

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Practice More CPU (Central Processing Unit) Questions

Question #1 Report Error
The coherence directory is used in:
A. Large scale multi-core systems
B. Mobile only
C. Single core
D. Cache less designs

Correct Answer: Option A


Explanation:
For directory-based coherence.

This question belongs to: Computer CPU (Central Processing Unit)
Question #2 Report Error
Which helps mitigate Spectre attacks?
A. More cores
B. Larger cache
C. Hardware fences and speculation barriers
D. Higher TDP

Correct Answer: Option C


Explanation:
Processor and OS level mitigations.

This question belongs to: Computer CPU (Central Processing Unit)
Question #3 Report Error
In CPU design, 'IPC' stands for:
A. Integrated Power Control
B. Instructions Per Cycle
C. Internal Processing Cache
D. Interrupt Priority Controller

Correct Answer: Option B


Explanation:
IPC measures how many instructions a CPU executes per clock cycle.

This question belongs to: Computer CPU (Central Processing Unit)