The translation lookaside buffer (TLB) caches: MCQ with Answer and Explanation

The translation lookaside buffer (TLB) caches:
A. Control signals
B. Data values
C. Instructions
D. Virtual to physical address translations
Answer: Option D
Solution (By JKExamLibrary)
Speeds up memory address translation.

This question belongs to: Computer CPU (Central Processing Unit)

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Practice More CPU (Central Processing Unit) Questions

Question #1 Report Error
The Arithmetic Logic Unit (ALU) primarily performs:
A. Fetching instructions from memory
B. Arithmetic and logical operations
C. Controlling input/output devices
D. Storing data permanently

Correct Answer: Option B


Explanation:
ALU executes arithmetic operations like addition and logical operations like AND, OR.

This question belongs to: Computer CPU (Central Processing Unit)
Question #2 Report Error
A CPU with integrated graphics has:
A. Only CPU functions
B. GPU on the same die
C. No display capability
D. Separate GPU

Correct Answer: Option B


Explanation:
APUs or processors with iGPU combine CPU and graphics.

This question belongs to: Computer CPU (Central Processing Unit)
Question #3 Report Error
The micro-operation (micro-op) is:
A. High level code
B. Memory block
C. Low-level operation in complex instructions
D. User command

Correct Answer: Option C


Explanation:
CISC instructions are broken into simpler micro-ops.

This question belongs to: Computer CPU (Central Processing Unit)