CPU (Central Processing Unit) MCQs

Practice CPU MCQs with answers and explanations covering ALU, CU, registers, processors and central processing unit concepts frequently asked in competitive exams.

327 Total

Question #241 Report Error

The commit stage is also called:

A. Retirement stage

B. Execute stage

C. Fetch stage

D. Decode stage

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Correct Answer: Option A

Explanation:
It finalizes instruction effects.

This question belongs to: Computer CPU (Central Processing Unit)

Question #242 Report Error

3D stacking in CPUs improves:

A. Power consumption negatively

B. Clock speed only

C. Manufacturing simplicity

D. Cache density and bandwidth

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Correct Answer: Option D

Explanation:
Like AMD's 3D V-Cache.

This question belongs to: Computer CPU (Central Processing Unit)

Question #243 Report Error

A scoreboard is used for:

A. Static scheduling

B. Interrupt priority

C. Dynamic instruction scheduling

D. Cache management

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Correct Answer: Option C

Explanation:
Tracks dependencies in older designs.

This question belongs to: Computer CPU (Central Processing Unit)

Question #244 Report Error

The physical register file is used in:

A. Register renaming implementations

B. Basic scalar processors

C. Memory controllers

D. No modern CPU

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Correct Answer: Option A

Explanation:
Larger than architectural registers.

This question belongs to: Computer CPU (Central Processing Unit)

Question #245 Report Error

Which is a common cause of CPU stalls?

A. More cores

B. Larger cache

C. High clock speed

D. Cache miss or branch misprediction

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Correct Answer: Option D

Explanation:
Both increase pipeline bubbles.

This question belongs to: Computer CPU (Central Processing Unit)

Question #246 Report Error

The bus cycle includes:

A. Address, data, and control phases

B. ALU operations only

C. Register transfer

D. Instruction decode

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Correct Answer: Option A

Explanation:
For communication with memory.

This question belongs to: Computer CPU (Central Processing Unit)

Question #247 Report Error

Intel's Alder Lake introduced:

A. Hybrid big.LITTLE architecture in x86

B. No efficiency cores

C. Only high power cores

D. First multi-core

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Correct Answer: Option A

Explanation:
Performance and efficiency cores.

This question belongs to: Computer CPU (Central Processing Unit)

Question #248 Report Error

The carry flag is set during:

A. Zero result

B. Unsigned arithmetic overflow

C. Signed overflow

D. Negative numbers

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Correct Answer: Option B

Explanation:
Important for multi-precision arithmetic.

This question belongs to: Computer CPU (Central Processing Unit)

Question #249 Report Error

VLIW architecture relies on:

A. Compiler to pack multiple operations

B. Hardware scheduling only

C. Dynamic execution

D. No parallelism

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Correct Answer: Option A

Explanation:
Very Long Instruction Word.

This question belongs to: Computer CPU (Central Processing Unit)

Question #250 Report Error

Which helps mitigate Spectre attacks?

A. Hardware fences and speculation barriers

B. Larger cache

C. More cores

D. Higher TDP

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Correct Answer: Option A

Explanation:
Processor and OS level mitigations.

This question belongs to: Computer CPU (Central Processing Unit)

Question #251 Report Error

The execution port in CPU dispatches to:

A. Fetch unit

B. Different functional units

C. Control signals

D. Memory only

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Correct Answer: Option B

Explanation:
For parallel execution.

This question belongs to: Computer CPU (Central Processing Unit)

Question #252 Report Error

AMD's Infinity Fabric is a:

A. Power delivery system

B. Instruction decoder

C. High-speed interconnect for chiplets

D. Cache protocol

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Correct Answer: Option C

Explanation:
Enables communication between dies.

This question belongs to: Computer CPU (Central Processing Unit)

Question #253 Report Error

The pipeline depth affects:

A. TDP only

B. Frequency potential and hazard complexity

C. Cache size

D. Core count

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Correct Answer: Option B

Explanation:
Deeper pipelines allow higher clocks but more hazards.

This question belongs to: Computer CPU (Central Processing Unit)

Question #254 Report Error

Which is not a type of cache mapping?

A. Virtual mapped

B. Physical only

C. Direct mapped, set associative, fully associative

D. None of the above

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Correct Answer: Option A

Explanation:
Standard techniques are the three listed.

This question belongs to: Computer CPU (Central Processing Unit)

Question #255 Report Error

The vector register file supports:

A. SIMD operations with multiple elements

B. Status flags

C. Scalar operations only

D. Address storage

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Correct Answer: Option A

Explanation:
For parallel data processing.

This question belongs to: Computer CPU (Central Processing Unit)

Question #256 Report Error

Core parking is a power management feature that:

A. Increases voltage

B. Puts idle cores into sleep state

C. Clears cache

D. Overclocks active cores

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Correct Answer: Option B

Explanation:
Saves energy.

This question belongs to: Computer CPU (Central Processing Unit)

Question #257 Report Error

The ITLB caches:

A. Data translations

B. Branch history

C. Instruction address translations

D. ALU results

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Correct Answer: Option C

Explanation:
Separate from DTLB.

This question belongs to: Computer CPU (Central Processing Unit)

Question #258 Report Error

Which extension provides hardware encryption acceleration?

A. SSE4

B. AES-NI

C. AVX only

D. FMA

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Correct Answer: Option B

Explanation:
Speeds up AES algorithms.

This question belongs to: Computer CPU (Central Processing Unit)

Question #259 Report Error

In-order execution processors are simpler but may have:

A. Higher complexity

B. Lower IPC in some workloads

C. Always better performance

D. No pipeline

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Correct Answer: Option B

Explanation:
Due to stalls on dependencies.

This question belongs to: Computer CPU (Central Processing Unit)

Question #260 Report Error

The mesh interconnect is used in:

A. Embedded systems only

B. GPUs exclusively

C. High core count Intel CPUs

D. Low power mobiles

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Correct Answer: Option C

Explanation:
Scalable for many cores.

This question belongs to: Computer CPU (Central Processing Unit)

CPU (Central Processing Unit) MCQs

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