CPU (Central Processing Unit) MCQs

Practice CPU MCQs with answers and explanations covering ALU, CU, registers, processors and central processing unit concepts frequently asked in competitive exams.

327 Total

Question #121 Report Error

Which technique reduces branch misprediction penalty?

A. No prediction

B. Slower clock

C. Branch prediction and speculative execution

D. Fewer registers

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Correct Answer: Option C

Explanation:
Modern CPUs use advanced predictors.

This question belongs to: Computer CPU (Central Processing Unit)

Question #122 Report Error

EPYC processors are designed for:

A. Toys

B. Smartphones

C. Servers and data centers

D. Basic desktops

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Correct Answer: Option C

Explanation:
AMD's server CPU line.

This question belongs to: Computer CPU (Central Processing Unit)

Question #123 Report Error

The reorder buffer in out-of-order CPUs helps maintain:

A. ALU speed

B. Faster fetch

C. Memory size

D. Program order for retirement

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Correct Answer: Option D

Explanation:
Ensures correct sequential appearance of results.

This question belongs to: Computer CPU (Central Processing Unit)

Question #124 Report Error

Neural Processing Unit (NPU) in CPUs is for:

A. Basic arithmetic

B. Accelerating AI and machine learning tasks

C. Display

D. Storage

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Correct Answer: Option B

Explanation:
Specialized for tensor operations in AI.

This question belongs to: Computer CPU (Central Processing Unit)

Question #125 Report Error

Which is a measure of CPU efficiency?

A. Color of chip

B. Performance per watt

C. Size of case

D. Number of fans

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Correct Answer: Option B

Explanation:
Important for mobile and data center applications.

This question belongs to: Computer CPU (Central Processing Unit)

Question #126 Report Error

The translation lookaside buffer (TLB) caches:

A. Virtual to physical address translations

B. Data values

C. Instructions

D. Control signals

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Correct Answer: Option A

Explanation:
Speeds up memory address translation.

This question belongs to: Computer CPU (Central Processing Unit)

Question #127 Report Error

Apple Silicon like M-series uses:

A. No CPU

B. CISC heavy

C. ARM-based architecture

D. x86 only

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Correct Answer: Option C

Explanation:
Custom ARM chips for Macs.

This question belongs to: Computer CPU (Central Processing Unit)

Question #128 Report Error

Simultaneous Multithreading (SMT) is known as:

A. Power saving

B. Single threading

C. Hyper-threading in Intel

D. Cache only

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Correct Answer: Option C

Explanation:
Allows multiple threads per physical core.

This question belongs to: Computer CPU (Central Processing Unit)

Question #129 Report Error

The critical path in CPU design determines:

A. Memory size

B. The maximum clock frequency

C. Color

D. Number of pins

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Correct Answer: Option B

Explanation:
Longest delay path limits speed.

This question belongs to: Computer CPU (Central Processing Unit)

Question #130 Report Error

Which is not a CPU performance metric?

A. Power consumption

B. Temperature in Celsius

C. Benchmark scores

D. IPC, clock speed, cores

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Correct Answer: Option B

Explanation:
Temperature is a constraint, not direct performance measure.

This question belongs to: Computer CPU (Central Processing Unit)

Question #131 Report Error

The memory controller can be:

A. Part of ALU

B. Always external

C. Integrated in the CPU

D. Irrelevant

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Correct Answer: Option C

Explanation:
On-die memory controller reduces latency.

This question belongs to: Computer CPU (Central Processing Unit)

Question #132 Report Error

Ray tracing acceleration in CPUs/GPUs uses:

A. Specialized hardware units

B. Software simulation

C. No support

D. Basic ALU only

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Correct Answer: Option A

Explanation:
Dedicated RT cores or units.

This question belongs to: Computer CPU (Central Processing Unit)

Question #133 Report Error

Which company developed the x86-64 architecture extension?

A. Qualcomm

B. Intel only

C. AMD

D. ARM

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Correct Answer: Option C

Explanation:
AMD64 extended the original x86.

This question belongs to: Computer CPU (Central Processing Unit)

Question #134 Report Error

The ROB (Reorder Buffer) size affects:

A. Power only

B. How many instructions can be in flight

C. Cache size

D. Address bus

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Correct Answer: Option B

Explanation:
Larger ROB supports more out-of-order execution.

This question belongs to: Computer CPU (Central Processing Unit)

Question #135 Report Error

Secure enclaves like Intel SGX provide:

A. Protected execution environment

B. Public data access

C. Slower processing

D. No security

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Correct Answer: Option A

Explanation:
Isolated from the rest of the system.

This question belongs to: Computer CPU (Central Processing Unit)

Question #136 Report Error

The fetch width in superscalar CPUs refers to:

A. Cache line

B. Register size

C. Data bus width

D. Number of instructions fetched per cycle

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Correct Answer: Option D

Explanation:
Affects instruction throughput.

This question belongs to: Computer CPU (Central Processing Unit)

Question #137 Report Error

Which of the following is a low-power CPU design focus?

A. Gaming PCs

B. Mobile and embedded systems

C. Servers exclusively

D. High performance desktops only

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Correct Answer: Option B

Explanation:
Emphasis on efficiency for battery life.

This question belongs to: Computer CPU (Central Processing Unit)

Question #138 Report Error

The rename registers in modern CPUs help avoid:

A. Structural hazards only

B. False dependencies (WAR, WAW)

C. True data dependencies

D. Control hazards

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Correct Answer: Option B

Explanation:
Register renaming for better ILP.

This question belongs to: Computer CPU (Central Processing Unit)

Question #139 Report Error

TSMC and Samsung are leaders in:

A. Software development

B. Keyboard production

C. Monitor manufacturing

D. CPU chip fabrication

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Correct Answer: Option D

Explanation:
Semiconductor foundries.

This question belongs to: Computer CPU (Central Processing Unit)

Question #140 Report Error

The loop buffer or uop cache stores:

A. Power states

B. Addresses

C. Data from memory

D. Decoded micro-operations for loops

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Correct Answer: Option D

Explanation:
Reduces power by avoiding repeated decode.

This question belongs to: Computer CPU (Central Processing Unit)

CPU (Central Processing Unit) MCQs

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